HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 151

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
• Example 2: Repeat loop consisting of three instructions
• Example 3: Repeat loop consisting of two instructions
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
RptDtct:
RptStart: instr1
RptEnd:
RptDtct:
RptStart: instr1
RptEnd:
LDRS RptDtct +4
LDRE RptDtct +4
SETRC #4
instr0
Instr2
instr3
LDRS RptDtct +6; Sets (repeat detection instruction
LDRE RptDtct +4
SETRC #4
instr0
instr2
; Sets (repeat detection instruction
; Sets (repeat detection instruction
; Sets the number of repetitions (4) to
; If RE-RS==0 during SETRC instruction
; An instruction prior to the Repeat
; [Repeat start instruction]
;
; [Repeat end instruction]
; Sets the number of repetitions (4) to
; If RE-RS==-2 during SETRC instruction
; An instruction prior to the Repeat
; [Repeat start instruction]
; [Repeat end instruction]
execution, the repeat loop is regarded
address + 4) to the RS register
address + 4) to the RE register
the RC[11:0] bits of the SR register
execution, the repeat loop is regarded
as three-instruction repeat.
start instruction is regarded as a
repeat detection instruction.
address + 6) to the RS register
the RC[11:0] bits of the SR register
as two-instruction repeat.
start instruction is regarded as a
repeat detection instruction.
; Sets (repeat detection instruction
address + 4) to the RE register
Section 3 DSP Operating Unit
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