HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 279

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
7.1.2
EXPEVT is assigned to address H'FFFFFFD4 and consists of a 12-bit exception code. Exception
codes to be specified in EXPEVT are those for resets and general exceptions. These exception
codes are automatically specified the hardware when an exception occurs. Only bits 11 to 0 of
EXPEVT can be re-written using the software.
Note: Initialized to H'000 at power-on reset and H'020 at manual reset.
7.1.3
INTEVT is assigned to address H'FFFFFFD8 and stores an exception code or a code which
indicates interrupt priority order. A code to be specified when an interrupt occurs is determined by
an interrupt source. (For details, see section 8.4.6, Interrupt Exception Handling and Priority.)
These exception and interrupt priority order codes are automatically specified by the hardware
when an exception occurs. INTEVT can be modified using the software. Only bits 11 to 0 of
INTEVT can be modified using the software.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
31 to 12 ⎯
11 to 0
Bit
31 to 12 ⎯
11 to 0
Exception Event Register (EXPEVT)
Interrupt Event Register (INTEVT)
Bit Name
EXPEVT
Bit Name
INTEVT
Initial
Value
All 0
*
Initial
Value
All 0
R/W
R
R/W
R/W
R
R
Description
These bits are always read as 0. The write value
should always be 0.
Description
These bits are always read as 0. The write value
should always be 0.
12-bit Exception Code
Reserved
12-bit Exception Code
Reserved
Section 7 Exception Handling
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