HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1060

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 30 SIM Card Module (SIM)
Page 1000 of 1414
Bit
1
Bit Name
WAIT_ER
Initial
Value
0
R/W Description
R/W Wait Error
Indicates the wait timer error status.
0: Indicates that the interval between the start of two
[Clearing conditions]
1: Indicates that the interval between the start of two
[Setting conditions]
Notes:
successive characters has not exceeded the etu set by
SCWAIT.
successive characters has exceeded the etu set by
SCWAIT.
On reset
When 0 is written to the WAIT_ER flag
In T = 0 mode, when the interval between the start of a
character to be received and immediately preceding
transmitted or received character exceeds the (value of 60
× SCWAIT: Operation wait time) etu.
In T = 1 mode, when the interval between the start of two
successive received characters exceeds the (SCWAIT
value: Character protection time) etu.
1. Even if the RE bit in SCSCR is cleared to 0, the
2. In T = 0 mode, even if the setting condition for the
3. In T = 0 mode, if the WAIT_ER flag does not need
WAIT_ER flag is unaffected, and the previous state
is retained.
WAIT_ER flag is satisfied when the RE bit is set to
1, the WAIT_ER flag may not be set to 1. In this
case, the RE bit has been set to 1, then the
WAIT_ER flag is set to 1 after 60 × (SCWAIT + n)
etu (n ≥ 0: depending on the timing for setting the
RE bit to 1) since the last transmission or reception.
to be set to 1 after 60 × (SCWAIT + n) etu since the
last transmission or reception, the mode should be
changed from T = 0 to T = 1, and changed to T = 0
again by the PB bit in SCSCMR. In T = 1 mode, if
the WAIT_ER flag does not need to be set to 1 after
(SCWAIT) etu since the last reception, the mode
should be changed from T = 1 to T = 0, and
changed to T = 1 again by the PB bit in SCSCMR.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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