HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1174

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 33 User Break Controller (UBC)
33.2.2
BAMRA is a 32-bit readable/writable register. BAMRA specifies bits masked in the break address
specified by BARA.
33.2.3
BBRA is a 16-bit readable/writable register, which specifies (1) L bus cycle or I bus cycle, (2)
instruction fetch or data access, (3) read or write, and (4) operand size as the break conditions of
channel A.
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Bit
31 to 0 BAMA31 to
Bit
15 to 8 ⎯
7
6
Bit Name
BAMA 0
Bit Name
CDA1
CDA0
Break Address Mask Register A (BAMRA)
Break Bus Cycle Register A (BBRA)
Initial
Value
All 0
Initial
Value
All 0
0
0
R/W
R/W
R/W
R
R/W
R/W
Description
Specify bits masked in the channel A break address bits
specified by BARA (BAA31 to BAA0).
0: Break address bit BAAn of channel A is included in
1: Break address bit BAAn of channel A is masked and
Note: n = 31 to 0
Description
These bits are always read as 0. The write value should
always be 0.
L Bus Cycle/I Bus Cycle Select A
Select the L bus cycle or I bus cycle as the bus cycle of
the channel A break condition.
00: Condition comparison is not performed
01: The break condition is the L bus cycle
10: The break condition is the I bus cycle
11: The break condition is the L bus cycle
Break Address Mask A
Reserved
the break condition
is not included in the break condition
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010