HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 303

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
The interrupt controller (INTC) determines the priority of interrupt sources and controls interrupt
requests to the CPU. The INTC registers set the priority of each interrupt, allowing the user to
process interrupt requests according to the user-set priority.
8.1
• 16 levels of interrupt priority can be set
• NMI noise canceller function
• IRQ interrupts can be set
• Interrupt request signal can be externally output (IRQOUT pin)
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
By setting the interrupt-priority registers, the priorities of on-chip peripheral modules, and IRQ
and PINT interrupts can be selected from 16 levels for individual request sources.
An NMI input-level bit indicates the NMI pin state. By reading this bit in the interrupt
exception service routine, the pin state can be checked, enabling it to be used as a noise
canceller.
Detection of low level, high level, rising edge, or falling edge
By notifying the external bus master that the external interrupt and on-chip peripheral module
interrupt requests have been generated, the bus mastership can be requested.
Features
Section 8 Interrupt Controller (INTC)
Section 8 Interrupt Controller (INTC)
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