HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 830

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 24 USB Host Controller (USBH)
Page 770 of 1414
Bit
5
4
3
Bit Name
BLE
CLE
IE
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Bulk List Enable
This bit is set to enable the processing of the bulk list in
the next frame. When this bit is cleared by HCD, the
processing of the bulk list is not carried out after next SOF.
The host controller checks this bit when processing this
list. When disabling, HCD can correct the list. When
USBHBCED indicates ED to be deleted, HCD should
hasten the pointer by updating USBHBCED before re-
enabling the list processing.
0: Bulk list processing is not carried out
1: Bulk list processing is carried out
Control List Enable
This bit is set to enable the processing of the control list in
the next frame. If cleared by HCD, the processing of the
control list is not carried out after next SOF. The host
controller must check this bit whenever the list will be
processed. When disabling, HCD can correct the list.
When USBHCCED indicates ED to be deleted, HCD
should hasten the pointer by updating USBHCCED before
re-enabling the list processing.
0: Control list processing is not carried out
1: Control list processing is carried out
Isochronous Enable
This bit is used by HCD to enable/disable the processing
of isochronous ED. While processing the periodic list, HC
will check the status of this bit when it finds an
isochronous ED (F =1). If set (enabled), the host controller
continues to process ED. If cleared (disabled), the host
controller stops the processing of the periodic list
(currently includes only isochronous ED) and starts to
process the bulk/control list. Setting this bit is guaranteed
to be valid in the next frame (not in the current frame).
0: Processes isochronous ED
1: Processes the bulk/control list
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010