HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 952

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 26 LCD Controller (LCDC)
26.3.19 LCDC Control Register (LDCNTR)
LDCNTR specifies start and stop of display by the LCDC.
When 1s are written to the DON2 bit and the DON bit, the LCDC starts display. Turn on the LCD
module following the sequence set in the LDPMMR and LDCNTR. The sequence ends when the
LPS[1:0] value changes from B'00 to B'11. Do not make any action to the DON bit until the
sequence ends.
When 0 is written to the DON bit, the LCDC stops display. Turn off the LCD module following
the sequence set in the LDPMMR and LDCNTR. The sequence ends when the LPS[1:0] value
changes from B'11 to B'00. Do not make any action to the DON bit until the sequence ends.
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Bit
3
2
1
0
Bit
15 to 5 ⎯
4
Bit Name
OFFF3
OFFF2
OFFF1
OFFF0
Bit Name
DON2
1
1
1
1
Initial Value
Initial Value
All 0
0
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
LCDC Power-Off Sequence Period
Set the period from stopping output of the display
data (LCD_DATA) and timing signals (LCD_FLM,
LCD_CL1, LCD_CL2, and LCD_M_DISP) to
LCD_VCPWC negation to in the power-off
sequence of the LCD module in frame units.
Specify to the value of (the period)-1.
This period is the (f) period in figures 26.4 to 26.7,
Power-Supply Control Sequence and States of the
LCD Module.
Description
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Display On 2
Specifies the start of the LCDC display operation.
0: LCDC is being operated or stopped
1: LCDC starts operation
When this bit is read, always read as 0. Write 1 to
this bit only when starting display. If a value other
than 0 is written when starting display, the
operation is not guaranteed. When 1 is written to,
it resumes automatically to 0. Accordingly, this bit
does not need to be cleared by writing 0.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010