MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 167

• Manufacturer Part Number: MCF5307CFT66B
• Description: IC MPU 32BIT 66MHZ COLDF 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307CFT66B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

1
5.5.3.3.13 Write Debug Module Register (
The operand (longword) data is written to the specified debug module register. All 32 bits
of the register are altered by the write. DSCLK must be inactive while the debug module
register writes from the CPU accesses are performed using the WDEBUG instruction.
Command Format:
Table 5-3 shows the definition of the DRc write encoding.
Command Sequence:
Operand Data:
Result Data:
5.6 Real-Time Debug Support
The ColdFire Family provides support debugging real-time applications. For these types of
embedded systems, the processor must continue to operate during debug. The foundation
of this area of debug support is that while the processor cannot be halted to allow
debugging, the system can generally tolerate small intrusions into the real-time operation.
The debug module provides three types of breakpoints—PC with mask, operand address
range, and data with mask. These breakpoints can be configured into one- or two-level
triggers with the exact trigger response also programmable. The debug module
programming model can be written from either the external development system using the
debug serial interface or from the processor’s supervisor programming model using the
WDEBUG instruction. Only CSR is readable using the external development system.
15
Note: 0x4 is a three-bit field
14
0x2
13
12
WDMREG
Figure 5-42.
???
Figure 5-43.
Longword data is written into the specified debug register. The data
is supplied most-significant word first.
Command complete status (0xFFFF) is returned when register write
is complete.
Freescale Semiconductor, Inc.
11
For More Information On This Product,
10
0xC
Chapter 5. Debug Support
Go to: www.freescale.com
WDMREG
"NOT READY"
"ILLEGAL"
MS DATA
WDMREG
9
XXX
8
D[31:16]
D[15:0]
BDM Command Format
Command Sequence
7
"NOT READY"
"NOT READY"
NEXT CMD
LS DATA
WDMREG
0x4
6
1
5
)
"CMD COMPLETE"
NEXT CMD
4
Real-Time Debug Support
3
DRc
2
1
5-39
0