MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 339

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MCF5307CFT66B

Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307CFT66B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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14.5.6.1 UART Module Initialization Sequence
Table 14-14 shows the UART module initialization sequence.
UCRn
UIVRn
UIMRn
UACRn
UCSRn
UMR1n
UMR2n
UCR
Register
• Interrupt handling—Consists of SIRQ (sheet 4), which is executed after the UART
module generates an interrupt caused by a change-in-break (beginning of a break).
SIRQ then clears the interrupt source, waits for the next change-in-break interrupt
(end of break), clears the interrupt source again, then returns from exception
processing to the system monitor.
Reset the receiver and transmitter.
Reset the mode pointer (MISC[2–0] = 0b001).
Program the vector number for a UART module interrupt.
Enable the preferred interrupt sources.
Initialize the input enable control (IEC bit).
Select the receiver and transmitter clock. Use timer as source if required.
If preferred, program operation of receiver ready-to-send (RxRTS bit).
Select receiver-ready or FIFO-full notification (RxRDY/FFULL bit).
Select character or block error mode (ERR bit).
Select parity mode and type (PM and PT bits).
Select number of bits per character (B/Cx bits).
Select the mode of operation (CMx bits).
If preferred, program operation of transmitter ready-to-send (TxRTS).
If preferred, program operation of clear-to-send (TxCTS bit).
Select stop-bit length (SBx bits).
UART module registers can be accessed by word or byte
operations, but only data byte D[7:0] is valid.
Table 14-14. UART Module Initialization Sequence
Freescale Semiconductor, Inc.
For More Information On This Product,
Chapter 14. UART Modules
Go to: www.freescale.com
NOTE:
Setting
Operation
14-29

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