MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 303
MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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T0_LOOP
T0_FINISH
13.5 Calculating Time-Out Values
The formula below determines time-out periods for various reference values:
When calculating time-out periods, add 1 to the prescaler to simplify calculating, because
TMRn[PS] = 0x00 yields a prescaler of 1 and TMRn[PS] = 0xFF yields a prescaler of 256.
For example, if a 45-MHz timer clock is divided by 16, TMRn[PS] = 0x7F, and the timer
is referenced at 0xABCD (43,981 decimal), the time-out period is as follows:
The time-out values in Table 13-5 represent the time it takes the counter value in TCNn
value to go from 0x0000 to the default reference value, TRRn[REF] = 0xFFFF. Time-out
values shown for BCLKO are divided by 1 and by 16 (TMRn[CLK] is 01 or 10,
respectively).
Any clock source (BCLKO ÷ 1, BCLKO ÷ 16, or TIN) can be prescaled using TMRn[PS].
The BCLKO frequency depends on the prescaler value (TMRn[PS]) and on the PLL clock
setting, as described inChapter 7, “Phase-Locked Loop (PLL).”
Decimal
TMR[PS]
0
1
2
3
4
5
move.w TMR0,D0;save the contents of TMR0 while setting
bset #0,D0 ;the 0 bit. This enables timer 0 and starts counting
move.w D0, TMR0 ;load the value back into the register, setting TMR0[RST]
move.b TER0,D1 ;load TER0 and see if
btst #1,D1 ;TER0[REF] has been set
beq T0_LOOP
addi.l #1,D2;Increment D2
cmp.l #5,D2;Did D2 reach 5? (i.e. timer ref has timed)
beq T0_FINISH;If so, end timer0 example. Otherwise jump back.
move.b #0x02,D0 ;writing one to TER0[REF] clears the event flag
move.b D0,TER0
jmp T0_LOOP
HALT;End processing. Example is finished
Time-out period = (1/clock frequency) x (1 or 16) x (TMRn[PS] + 1) x
(TRRn[REF])
Time-out period = (1/45) x (16) x (127 + 1) x (43,981) = 1.67 S
Table 13-5. Calculated Time-out Values (90-MHz Processor Clock)
Hex
0
1
2
3
4
5
0.06991
0.09321
0.11651
0.13981
TMR[CLK] = 10 (System Bus Clock/16)
45 MHz
0.0233
0.0466
Freescale Semiconductor, Inc.
For More Information On This Product,
0.03495
0.06991
0.10486
0.13981
0.17476
0.20972
30 MHz
Chapter 13. Timer Module
Go to: www.freescale.com
22.5 MHz
0.09321
0.13981
0.18641
0.23302
0.27962
0.0466
0.00146
0.00291
0.00437
0.00583
0.00728
0.00874
45 MHz
TMR[CLK] = 01 (System Bus Clock/1)
Calculating Time-Out Values
0.00218
0.00437
0.00655
0.00874
0.01092
0.01311
30 MHz
22.5 MHz
0.00291
0.00583
0.00874
0.01165
0.01456
0.01748
13-7
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