MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 279
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MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 12
DMA Controller Module
This chapter describes the MCF5307 DMA controller module. It provides an overview of
the module and describes in detail its signals and registers. The latter sections of this
chapter describe operations, features, and supported data transfer modes in detail.
12.1 Overview
The direct memory access (DMA) controller module provides an efficient way to move
blocks of data with minimal processor interaction. The DMA module, shown in
Figure 12-1, provides four channels that allow byte, word, or longword operand transfers.
Each channel has a dedicated set of registers that define the source and destination
addresses (SARn and DARn), byte count (BCRn), and control and status (DCRn and
DSRn). Transfers can be dual or single address to off-chip devices or dual address to
on-chip devices, such as UART, SDRAM controller, and parallel port.
Read Bus Data
Data Path
Requests
External
Internal
Bus
Requests
Channel
Write Bus Data
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 12-1. DMA Signal Diagram
Chapter 12. DMA Controller Module
Channel 0
DAR0
BCR0
DCR0
DSR0
SAR0
Data Path
Control
Go to: www.freescale.com
Channel
Enables
Control
Channel 1
MUX
SAR1
DAR1
BCR1
DCR1
DSR1
Arbitration/
Control
MUX
Channel 2
Channel
Attributes
BCR2
DCR2
DSR2
SAR2
DAR2
Current Master Attributes
External Bus Address
External Bus Size
Channel 3
DCR3
SAR3
DAR3
BCR3
DSR3
Interrupts
Interface Bus
Bus Signals
Registered
12-1
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