MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 177

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MCF5307CFT66B

Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307CFT66B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Intended Audience
Part II is intended for users who need to understand the interface between the ColdFire core
processor complex, described in Part I, and internal peripheral devices, described in
Part III. It includes a general description of the SIM and individual chapters that describe
components of the SIM, such as the phase-lock loop (PLL) timing source, interrupt
controller for both on-chip and external peripherals, configuration and operation of chip
selects, and the SDRAM controller.
Contents
Part II contains the following chapters:
• Chapter 6, “SIM Overview,” describes the SIM programming model, bus
• Chapter 7, “Phase-Locked Loop (PLL),” describes configuration and operation of
• Chapter 8, “I2C Module,” describes the MCF5307 I2C module, including I2C
• Chapter 9, “Interrupt Controller,” describes operation of the interrupt controller
• Chapter 10, “Chip-Select Module,” describes the MCF5307 chip-select
• Chapter 11, “Synchronous/Asynchronous DRAM Controller Module,” describes
arbitration, and system-protection functions for the MCF5307.
the PLL module. It describes in detail the registers and signals that support the PLL
implementation.
protocol, clock synchronization, and the registers in the I2C programing model. It
also provides extensive programming examples.
portion of the SIM. Includes descriptions of the registers in the interrupt controller
memory map and the interrupt priority scheme.
implementation, including the operation and programming model, which includes
the chip-select address, mask, and control registers.
configuration and operation of the synchronous/asynchronous DRAM controller
component of the SIM. It begins with a general description and brief glossary, and
System Integration Module (SIM)
Freescale Semiconductor, Inc.
For More Information On This Product,
Part II. System Integration Module (SIM)
Go to: www.freescale.com
Part II
II-i

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