MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 25

• Manufacturer Part Number: MCF5307CFT66B
• Description: IC MPU 32BIT 66MHZ COLDF 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307CFT66B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table
Number
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
3-1
3-2
3-3
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
5-1
User-Level Registers................................................................................................... 1-14
Supervisor-Level Registers......................................................................................... 1-14
CCR Field Descriptions ............................................................................................. 2-28
MOVEC Register Map ............................................................................................... 2-29
Status Field Descriptions ............................................................................................ 2-30
Integer Data Formats................................................................................................... 2-31
ColdFire Effective Addressing Modes........................................................................ 2-34
Notational Conventions .............................................................................................. 2-34
User-Mode Instruction Set Summary ......................................................................... 2-37
Supervisor-Mode Instruction Set Summary................................................................ 2-40
Misaligned Operand References ................................................................................. 2-41
Move Byte and Word Execution Times...................................................................... 2-42
Move Long Execution Times...................................................................................... 2-42
MAC Move Execution Times..................................................................................... 2-43
One-Operand Instruction Execution Times ................................................................ 2-43
Two-Operand Instruction Execution Times................................................................ 2-44
Miscellaneous Instruction Execution Times............................................................... 2-45
General Branch Instruction Execution Times............................................................. 2-46
Bcc Instruction Execution Times................................................................................ 2-47
Exception Vector Assignments................................................................................... 2-48
Format Field Encoding ............................................................................................... 2-49
Fault Status Encodings................................................................................................ 2-50
MCF5307 Exceptions ................................................................................................. 2-50
MAC Instruction Summary........................................................................................... 3-4
Two-Operand MAC Instruction Execution Times ....................................................... 3-5
MAC Move Instruction Execution Times..................................................................... 3-6
RAMBAR Field Description ........................................................................................ 4-3
Examples of Typical RAMBAR Settings ..................................................................... 4-6
Valid and Modified Bit Settings ................................................................................... 4-8
CACR Field Descriptions ........................................................................................... 4-21
ACRn Field Descriptions............................................................................................ 4-23
Cache Line State Transitions ...................................................................................... 4-27
Cache Line State Transitions (Current State Invalid) ................................................. 4-28
Cache Line State Transitions (Current State Valid) ................................................... 4-28
Cache Line State Transitions (Current State Modified) ............................................. 4-29
Debug Module Signals.................................................................................................. 5-2
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
TABLES
Tables
Title
Number
Page
xxv