MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 283

• Manufacturer Part Number: MCF5307CFT66B
• Description: IC MPU 32BIT 66MHZ COLDF 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307CFT66B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Channel
DMA
0
1
2
MBAR
Offset
0x30C
0x30C
0x34C
0x34C
0x38C
0x38C
0x300
0x304
0x308
0x310
0x314
0x340
0x344
0x348
0x350
0x354
0x380
0x384
0x388
0x390
0x394
Table 12-2. Memory Map for DMA Controller Module Registers
DMA status register 0
DMA status register 1
DMA status register 2
DMA interrupt vector
DMA interrupt vector
DMA interrupt vector
register 0 (DIVR0)
register 1 (DIVR1)
register 2 (DIVR2)
(DSR0) [p. 12-10]
(DSR1) [p. 12-10]
(DSR2) [p. 12-10]
Byte count register 0 (BCR24BIT = 0)
Byte count register 1 (BCR24BIT = 0)
Byte count register 2 (BCR24BIT = 0)
Reserved
Reserved
Reserved
[p. 12-11]
[p. 12-11]
[p. 12-11]
[31:24]
Freescale Semiconductor, Inc.
For More Information On This Product,
Chapter 12. DMA Controller Module
Go to: www.freescale.com
Destination address register 0 (DAR0) [p. 12-7]
Destination address register 1 (DAR1) [p. 12-7]
Destination address register 2 (DAR2) [p. 12-7]
Source address register 0 (SAR0) [p. 12-6]
Source address register 1 (SAR1) [p. 12-6]
Source address register 2 (SAR2) [p. 12-6]
DMA control register 0 (DCR0) [p. 12-8]
DMA control register 1 (DCR1) [p. 12-8]
DMA control register 2 (DCR2) [p. 12-8]
Byte count register 0 (BCR24BIT = 1)
Byte count register 2 (BCR24BIT = 1)
Byte count register 1 (BCR24BIT = 1)
[23:16]
1
1
1
DMA Controller Module Programming Model
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
[15:8]
Reserved
Reserved
Reserved
1
1
1
(BCR1) [p. 12-7]
(BCR0) [p. 12-7]
(BCR2) [p. 12-7]
[7:0]
12-5