MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 233

• Manufacturer Part Number: MCF5307CFT66B
• Description: IC MPU 32BIT 66MHZ COLDF 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307CFT66B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

10.4.1.4 Code Example
The code below provides an example of how to initialize the chip-selects. Only chip selects
0, 1, 2, and 3 are programmed here; chip selects 4, 5, 6, and 7 are left invalid. MBARx
defines the base of the module address space.
CSAR0 EQU MBARx+0x080
CSMR0 EQU MBARx+0x084
CSCR0 EQU MBARx+0x08A
CSAR1 EQU MBARx+0x08C
CSMR1 EQU MBARx+0x090
CSCR1 EQU MBARx+0x096
CSAR2 EQU MBARx+0x098
CSMR2 EQU MBARx+0x09C
CSCR2 EQU MBARx+0x0A2
CSAR3 EQU MBARx+0x0A4
CSMR3 EQU MBARx+0x0A8
CSCR3 EQU MBARx+0x0AE
CSAR4 EQU MBARx+0x0B0
CSAR4 EQU MBARx+0x0B4
CSMR4 EQU MBARx+0x0BA
CSAR5 EQU MBARx+0x0BC
CSMR5 EQU MBARx+0x0C0
CSCR5 EQU MBARx+0x0C6
CSAR6 EQU MBARx+0x0C8
CSMR6 EQU MBARx+0x0CC
CSCR6 EQU MBARx+0x0D2
CSAR7 EQU MBARx+0x0D4
CSMR7 EQU MBARx+0x0D8
CSCR7 EQU MBARx+0x0DE
; All other chip selects should be programmed and made valid before global
; chip select is de-activated by validating CS0
; Program Chip Select 3 Registers
move.w
move.w
move.w
move.w
move.l #0x001F016B,D0
move.l D0,CSMR3
; Program Chip Select 2 Registers
move.w
Bits
2–0
3
BSTW Burst write enable. Specifies whether burst writes are used for memory associated with each CSn.
Name
—
#0x0040,D0
D0,CSAR3
#0x00A0,D0
D0,CSCR3
#0x0020,D0
0 Break data larger than the specified port size into individual port-sized, non-burst writes. For
1 Enables burst write of data larger than the specified port size, including longword writes to 8 and
Reserved, should be cleared.
example, a longword write to an 8-bit port takes four byte writes.
16-bit ports, word writes to 8-bit ports and line writes to 8-, 16-, and 32-bit ports.
Freescale Semiconductor, Inc.
Table 10-9. CSCRn Field Descriptions
For More Information On This Product,
;Chip select 0 address register
;Chip select 0 mask register
;Chip select 0 control register
;Chip select 1 address register
;Chip select 1 mask register
;Chip select 1 control register
;Chip select 2 address register
;Chip select 2 mask register
;Chip select 2 control register
;Chip select 3 address register
;Chip select 3 mask register
;Chip select 3 control register
;Chip select 4 address register
;Chip select 4 mask register
;Chip select 4 control register
;Chip select 5 address register
;Chip select 5 mask register
;Chip select 5 control register
;Chip select 6 address register
;Chip select 6 mask register
;Chip select 6 control register
;Chip select 7 address register
;Chip select 7 mask register
;Chip select 7 control register
;CSAR3 base address 0x00400000
;CSCR3 = no wait states, AA=0, PS=16-bit, BEM=1,
;BSTR=0, BSTW=0
;Address range from 0x00400000 to 0x005FFFFF
;WP,EM,C/I,SD,UD,V=1; SC,UC=0
;CSAR2 base address 0x00200000 (to 0x003FFFFF)
Chapter 10. Chip-Select Module
Go to: www.freescale.com
Description
Chip-Select Registers
10-9