MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 349
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MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Intended Audience
Part IV is intended for hardware designers who need to know the functions and electrical
characteristics of the MCF5407 interface. It includes a pinout, and both electrical and
functional descriptions of the MCF5307 signals. It also describes how these signals interact
to support the variety of bus operations shown in timing diagrams.
Contents
Part IV contains the following chapters:
• Chapter 16, “Mechanical Data,” provides a functional pin listing and package
• Chapter 17, “Signal Descriptions,” provides an alphabetical listing of MCF5307
• Chapter 18, “Bus Operation,” describes data transfers, error conditions, bus
• Chapter 19, “IEEE 1149.1 Test Access Port (JTAG),” describes configuration and
• Chapter 20, “Electrical Specifications,” describes AC and DC electrical
diagram for the MCF5307.
signals. This chapter describes the MCF5307 signals. In particular, it shows which
are inputs or outputs, how they are multiplexed, which signals require pull-up
resistors, and the state of each signal at reset.
arbitration, and reset operations. It describes transfers initiated by the MCF5307 and
by an external bus master, and includes detailed timing diagrams showing the
interaction of signals in supported bus operations. Note that Chapter 11,
“Synchronous/Asynchronous DRAM Controller Module,” describes DRAM cycles.
operation of the MCF5307 JTAG test implementation. It describes the use of JTAG
instructions and provides information on how to disable JTAG functionality.
specifications and thermal characteristics for the MCF5307. Because additional
speeds may have become available since the publication of this book, consult
Motorola’s ColdFire web page, http://www.motorola.com/coldfire, to confirm that
this is the latest information.
Freescale Semiconductor, Inc.
For More Information On This Product,
Part IV. Hardware Interface
Go to: www.freescale.com
Hardware Interface
Part IV
IV-i
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