MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 476
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MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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DSCLK, 5-2
E
Electrical specifications
F
Fault-on-fault halt, 5-16
H
Halt
Index-18
general guidelines, 11-8
non-page mode, 11-11
refresh operation, 11-16
registers, 11-3
signals, 17-16
synchronous operation
clock timing, 20-2
debug AC timing, 20-12
DMA timing, 20-19
general parameters, 20-1
I
input/iutput AC timing, 20-3
JTAG AC timing, 20-20
parallel port timing, 20-18
reset timing, 20-12
timer module AC timing, 20-14
UART module AC timing, 20-16
fault-on-fault, 5-16
2
C input/output timing, 20-15
burst page mode, 11-12
continuous page mode, 11-13
extended data out, 11-15
general, 11-4
mode signals, 11-4
register set, 11-4
address and control, 11-5
mask, 11-7
address and control registers, 11-20
address multiplexing, 11-23
auto-refresh, 11-31
burst page mode, 11-27
continuous page mode, 11-29
controller signals, 11-17
edge select, 11-18
general guidelines, 11-23
initialization, 11-33
interfacing, 11-27
mask registers, 11-22
mode register settings, 11-33
register set, 11-19
self-refresh, 11-32
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MCF5307 User’s Manual
INDEX
I
I
IEEE Standard 1149.1 Test Access Port, see JTAG
Instruction set
Integer data formats
Interrupt controller
J
JTAG
2
C
address register, 8-6
arbitration procedure, 8-4
clock
control register, 8-8
data I/O register, 8-10
features, 8-1
frequency divider register, 8-7
handshaking, 8-5
interface memory map, A-7
lost arbitration, 8-13
overview, 8-1
programming
protocol, 8-3
repeated START generation, 8-12
slave mode, 8-13
software response, 8-11
START generation, 8-10
status register, 8-9
STOP generation, 8-12
system configuration, 8-3
timing specifications, 20-15
general summary, 2-34
MAC summary, 3-4
MAC unit execution times, 3-5
memory, 2-32
registers, 2-31
autovector register, 9-5
overview, 9-1
pending and mask registers, 9-6
port assignment register, 9-7
AC timing, 20-20
obtaining IEEE Standard 1149.1, 19-12
overview, 19-1
registers
restrictions, 19-10
stretching, 8-5
synchronization, 8-5
examples, 8-10
model, 8-6
boundary scan, 19-7
bypass, 19-10
descriptions, 19-4
IDCODE, 19-6
instruction shift, 19-5
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