MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 312
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MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Serial Module Overview
14.2 Serial Module Overview
The MCF5307 contains two independent UART modules, whose features are as follows:
14.3 Register Descriptions
This section contains a detailed description of each register and its specific function.
Flowcharts in Section 14.5.6, “Programming,” describe basic UART module programming.
The operation of the UART module is controlled by writing control bytes into the
appropriate registers. Table 14-1 is a memory map for UART module registers.
14-2
• Each can be clocked by BCLKO, eliminating a need for an external crystal
• Full-duplex asynchronous/synchronous receiver/transmitter channel
• Quadruple-buffered receiver
• Double-buffered transmitter
• Independently programmable receiver and transmitter clock sources
• Programmable data format:
• Each channel programmable to normal (full-duplex), automatic echo, local
• Automatic wake-up mode for multidrop applications
• Four maskable interrupt conditions
• UART0 and UART1 have interrupt capability to DMA channels 2 and 3,
• Parity, framing, and overrun error detection
• False-start bit detection
• Line-break detection and generation
• Detection of breaks originating in the middle of a character
• Start/end break interrupt/status
— 5–8 data bits plus parity
— Odd, even, no parity, or force parity
— One, one-and-a-half, or two stop bits
loop-back, or remote loop-back mode
respectively, when either the RxRDY or FFULL bit is set in the USR.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MCF5307 User’s Manual
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