MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 322
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MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
FREESCAL
Quantity:
154
Company:
Part Number:
MCF5307CFT66B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Register Descriptions
14.3.8 UART Input Port Change Registers (UIPCRn)
The input port change registers (UIPCRn), Figure 14-9, hold the current state and the
change-of-state for CTS.
Table 14-7 describes UIPCRn fields.
14.3.9 UART Auxiliary Control Register (UACRn)
The UART auxiliary control registers (UACRn), Figure 14-7, control the input enable.
14-12
Bits Name
7–5
3–1
Address
Address
4
0
Reset
Reset
Field
Field
R/W
R/W
COS
CTS
—
—
Reserved, should be cleared.
Change of state (high-to-low or low-to-high transition).
0 No change-of-state since the CPU last read UIPCRn. Reading UIPCRn clears UISRn[COS].
1 A change-of-state longer than 25–50 µs occurred on the CTS input. UACRn can be programmed to
Reserved, should be cleared.
Current state. Starting two serial clock periods after reset, CTS reflects the state of CTS. If CTS is
detected asserted at that time, COS is set, which initiates an interrupt if UACRn[IEC] is enabled.
0 The current state of the CTS input is asserted.
1 The current state of the CTS input is negated.
7
7
generate an interrupt to the CPU when a change of state is detected.
Figure 14-9. UART Input Port Change Register (UIPCRn)
Figure 14-8. UART Transmitter Buffer (UTB0)
—
Freescale Semiconductor, Inc.
Table 14-7. UIPCRn Field Descriptions
For More Information On This Product,
0000
MBAR + 0x1D0 (UIPCR0), 0x210 (UIPCR1)
5
Go to: www.freescale.com
MCF5307 User’s Manual
MBAR + 0x1CC,0x20C
COS
4
0000_0000
Read only
Write only
Description
TB
0
3
111
11
1
CTS
CTS
0
0
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