TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 101

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RB000
7.3
7.3.1
7.3.2
disabling the voltage detection and the operation to be executed when the supply voltage (VDD) falls to or below the
detection voltage (VDxLVL) can be programmed.
Function
Two detection voltages (VDxLVL, x = 1 to 2) can be set in the voltage detection circuit. For each voltage, enabling/
ation.
released.
interrupt request signals. When VDCR2<VDxMOD> is set to "1", the operation mode is set to generate voltage
detection reset signals.
Enabling/disabling the voltage detection operation
Selecting the voltage detection operation mode
Setting VDCR2<VDxEN> to "1" enables the voltage detection operation. Setting it to "0" disables the oper-
VDCR2<VDxEN> is cleared to "0" immediately after a power-on reset or a reset by an external reset input is
When VDCR2<VDxMOD> is set to "0", the voltage detection operation mode is set to generate INTVLTD
Note:When the supply voltage (VDD) is lower than the detection voltage (VDxLVL), setting VDCR2<VDxEN>
INTVLTD interruptrequest signal
・ When the operation mode is set to generate INTVLTD interrupt signals (VDCR2<VDxMOD>="0")
・ When the operation mode is set to generate voltage detection reset signals (VDCR2<VDxMOD>="1")
to "1" generates an INTVLTD interrupt request signal or a voltage detection reset signal at the time.
voltage (VDD) falls to the detection voltage (VDxLVL).
Note1: Since the comparators used for voltage detection do not have a hysteresis structure, INTVLTD interrupt
Note2: In debug using the RTE870/C1 In-Circuit Emulator (ICE mode) with the TMP89C900 mounted on it, no
Note3: If the supply voltage (VDD) falls to the detection voltage (VDxLVL) during IDLE0 or SLEEP0 mode, an
(VDD) becomes lower than the detection voltage (VDxLVL).
When VDCR2<VDxEN>="1", an INTVLTD interrupt request signal is generated when the supply
Detection voltage level
When VDCR2<VDxEN> = "1", a voltage detection reset signal is generated when the supply voltage
VDCR2<VDxEN>
request signals may be generated frequently when the supply voltage (VDD) is close to the detection voltage
(VDxLVL). INTVLTD interrupt request signals may be generated not only when the supply voltage falls to
the detection voltage but also when it rises to the detection voltage.
interrupt is generated when the supply voltage rises to the detection voltage. Since the #!Undefined!# may
operate differently, take account of this difference when debugging programs.
INTVLTD interrupt request signal is generated after the TBT counts the specified period and IDLE0 or SLEEP
mode is released. In the case of STOP mode, an INTLVTD interrupt request signal is generated after STOP
mode is released by the STOP pin.
Figure 7-2 Voltage Detection Interrupt Request
VDD level
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(Note1)
(Note1,2)
TMP89FS60