TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 207

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA005
14.4.4
14.4.4.1
registers.
outputs can be output to the TC01 pin. This function facilitates the generation of remote-controlled waveforms,
for example.
In the 8-bit PPG mode, the pulses with arbitrary duty and cycle are output by using the T00REG and T00PWM
By setting the T001CR<OUTAND> register, a pulse that is a logical ANDed product of the TC00 and TC01
The operation of TC00 is described below, and the same applies to the operation of TC01.
8-bit programmable pulse generate (PPG) output mode
Set T00MOD<EIN0> to "0" and select the clock at T00MOD<TCK0>. Set the duty pulse width at T00PWM
and the cycle width at T00REG.
becomes invalid. Be sure to complete the required mode settings before starting the timer.
level as the initial state of the PPG0 pin. Setting T00MOD<TFF0> to "1" selects the "H" level as the initial
state of the PPG0 pin. If the PPG0 pin is set as the function output pin in the port setting while the timer is
stopped, the value of T00MOD<TFF0> is output to the PPG0 pin. Table 14-8 shows the list of output levels
of the PPG0 pin.
product of the TC00 and TC01 outputs.
TC00 is put into the 8-bit PPG mode by setting T00MOD<TCM0> to "10" and T001CR<TCAS> to "0".
Set T00MOD<DBE0> to "1" to use the double buffer.
Setting T001CR<T00RUN> to "1" starts the operation. After the timer is started, writing to T00MOD
Set the initial state of the PPG0 pin at T00MOD<TFF0>. Setting T00MOD<TFF0> to "0" selects the "L"
Setting the T001CR<OUTAND> bit to "1" allows the PPG0 pin to output a pulse that is a logical ANDed
Setting
PPG0 pin output
(TFF0=“0”)
PPG0 pin output
(TFF0=“1”)
Table 14-8 List of Output Levels of PPG0 Pin
TFF0
Timer start
0
1
(Duty pulse)
T00PWM
T00REG
Figure 14-8 PPG0 Pulse Output
(1 cycle)
Before the start
(initial state)
of operation
L
H
(Duty pulse)
T00PWM
T00REG
(1 cycle)
Page 191
T00PWM
matched
PPG0 pin output level
H
L
T00REG
matched
H
L
Operation stop-
(initial state)
ped
H
L
Timer stop
TMP89FS60