TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 83

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA000
4.3
External interrupt control register 4
EINTCR4
(0x0FDB)
to 4.
and 5.
Function
The condition for generating interrupt request signals and the noise cancel time can be set for external interrupts 1
The condition for generating interrupt request signals and the noise cancel time are fixed for external interrupts 0
Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock [Hz]
Note 2: Interrupt requests may be generated during transition of the operation mode. Before changing the operation mode, clear
Note 3: Interrupt requests may be generated when EINTCR4 is changed. Before doing such operation, clear the corresponding
Note 4: The contents of EINTCRx<INTxLVL> are updated each time an interrupt request signal is generated.
Note 5: Bits 7 to 5 of EINTCR4 are read as "0".
INI4LVL
INT4ES
INT4NC
Read/Write
Bit Symbol
After reset
the corresponding interrupt enable register to "0" to disable the generation of interrupt. When the operation mode is
changed from NORMAL1/2 or IDLE1/2 to SLOW1/2 or SLEEP1, wait 12/fs [s] after the operation mode is changed and
clear the interrupt latch. And when the operation mode is changed from SLOW1/2 or SLEEP1 to NORMAL1/2 or IDLE1/2,
wait 2/fcgck+3/fspl [s] after the operation mode is changed and clear the interrupt latch.
interrupt enable register to "0" to disable the generation of interrupt. When the operation mode is changed from NOR-
MAL1/2 or IDLE1/2 to SLOW1/2 or SLEEP1, wait 12/fs [s] after the operation mode is changed and clear the interrupt
latch. And when the operation mode is changed from SLOW1/2 or SLEEP1 to NORMAL1/2 or IDLE1/2, wait 2/fcgck+3/
fspl [s] after the operation mode is changed and clear the interrupt latch.
Noise canceller pass signal level
when the interrupt request signal is
generated for external interrupt 4
Selects the interrupt request gener-
ating condition for external interrupt
4
Sets the noise canceller sampling in-
terval for external interrupt 4
R
7
0
-
R
6
0
-
R
5
0
-
00 :
01 :
10 :
11 :
00 :
01 :
10 :
11 :
Page 67
0 :
1 :
Initial state or signal level "L"
Signal level "H"
An interrupt request is generated at the rising edge of the noise canceller
pass signal
An interrupt request is generated at the falling edge of the noise canceller
pass signal
An interrupt request is generated at both edges of the noise canceller pass
signal
An interrupt request is generated at "H" of the noise canceller pass signal
fcgck [Hz]
fcgck / 2
fcgck / 2
fcgck / 2
INT4LVL
NORMAL1/2, IDLE1/2
R
4
0
2
3
4
[Hz]
[Hz]
[Hz]
3
INT4ES
R/W
0
00 :
01 :
10 :
11 :
2
fs/4 [Hz]
fs/4 [Hz]
fs/4 [Hz]
fs/4 [Hz]
SLOW1/2, SLEEP1
1
TMP89FS60
INT4NC
R/W
0
0