TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 288
TMP89xy60UG/FG
Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP89XY60UGFG.pdf
(432 pages)
Specifications of TMP89xy60UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
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18.1
Communication Format
RA002
18.1
18.1.1
Communication Format
slave(s) connected to the bus, and transmits and receives data.
data.
ards:
The I
Communications are implemented between a master and slave.
The master transmits the start condition, the slave addresses, the direction bit and the stop condition to the
The slave detects these conditions transmitted from the master by the hardware, and transmits and receives
The data format of the I
The serial bus interface does not support the following functions among those specified by the I
I
2
C bus
1. Start byte
2. 10-bit addressing
3. SDA and SCL pins falling edge slope control
2
C bus is connected to devices via the SDA0 and SCL0 pins and can communicate with multiple devices.
Device 1
SDA
SCL
2
C bus that can communicate via the serial bus interface is shown in Figure 18-2.
VDD
Figure 18-1 Device Connections
Device 2
SDA
SCL
Page 272
Device n
SDA
SCL
TMP89FS60
2
C bus stand-
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