TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 87

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA000
4.3.4.2
4.3.4.3
Signal that has passed through
(detected at the falling edge)
(detected at the rising edge)
(detected at both edges)
be read by using EINTCR4<INT4LVL>. When both edges are selected as detection edges, the edge where
an interrupt is generated can be detected by reading EINTCR4<INT4LVL>.
interval selected at EINTCRx<INT4NC>. If the same level is detected three consecutive times, the signal is
recognized as a signal. If not, the signal is removed as noise.
Interrupt request signal
Interrupt request signal
Interrupt request signal
Interrupt request signal
Figure 4-6 Interrupt Request Generation and EINTCR4<INT4LVL>
The level of a signal that has passed through the noise canceller when an interrupt request is generated can
In NORMAL1/2 or IDLE1/2 mode, a signal that has been sampled by fcgck is sampled at the sampling
A noise canceller pass signal monitoring function when interrupt request signals are generated
Noise cancel time selection function
the noise canceller
(level detection)
INT4 pin
INT4LVL
INT4LVL
INT4LVL
INT4LVL
Table 4-5 Noise Canceller Sampling Lock
EINTCR4<INT4NC>
00
01
10
11
Page 71
Sampling interval
fcgck/2
fcgck/2
fcgck/2
fcgck
2
3
4
TMP89FS60

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