TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 303

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA002
18.4.14
18.4.15
by reading the contents of SBI0SR2<LRB>.
I2C0AR<SA> to the slave address.
I2C0AR<ALS> to "1". With a free data format, the slave address and the direction bit are not recognized, and
they are processed as data from immediately after the start condition.
SCL
SDA
SBI0SR2<LRB>
The SDA line value stored at the rising edge of the SCL line is set to SBI0SR2<LRB>.
In the acknowledge mode, immediately after an interrupt request is generated, an acknowledge signal is read
When the serial bus interface circuit is used in the I
When the serial bus interface circuit is used with a free data format not to recognize the slave address, set
Last received bit monitor
Slave address and address recognition mode specification
Figure 18-16 Changes in the Last Received Bit Monitor
D7
1
D7
D6
2
D6
D5
3
D5
Page 287
D4
4
D4
D3
5
D3
2
C bus mode, clear I2C0AR<ALS> to "0", and set
D2
6
D2
D1
7
D1
D0
8
D
Acknowledgment
9
Acknowledgment
TMP89FS60