TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 340

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

21.2
Functions
RA006
21.2.5
off to decrease the electric energy consumed.
In SLOW1 mode, a steady-state current can be cut by controlling registers, on the condition that the flash memory
is not accessed to execute a program on RAM. To cut a steady-state current being supplied to the flash memory,
set FLSSTB<FSTB> to "1" by using a control program allocated to RAM (if FLSSTB<FSTB> is configured
using a control program allocated to the flash memory, the configured value will be invalidated).
a program allocated to RAM. If the flash memory is accessed with FLSSTB<FSTB> set to "1," a flash standby
reset will occur.
"0" is effective), FSTB is automatically initialized to "0", and then the interrupt vector of the flash memory area
is read. If an interrupt occurs when the interrupt vector is assigned to the RAM area (SYSCR3<RVCTR> = "1"
is effective), FSTB is not cleared to "0", and then the interrupt vector of the RAM area is read. In this case, the
RAM area should be designated as a referential address of interrupt vector. If the flash memory area is designated
as a referential address of interrupt vector, a flash standby reset occurs after an interrupt is generated.
operations performed by a program transferred to RAM):
When the TMP89FS60 does not access the flash memory, a steady-state current of flash memory can be cut
In IDLE0, IDLE1, IDLE2, SLEEP0, SLEEP1, and STOP modes, a steady-state current is automatically cut.
To access the flash memory again after setting FLSSTB<FSTB> to "1", set FLSSTB<FSTB> to "0" by using
If an interrupt occurs when the interrupt vector is assigned to the flash memory area (SYSCR3<RVCTR> =
Operations performed by controlling the FLSSTB register are described below
(1 and 2 show the operations performed by a program residing in the flash memory, and 3 through 8 show the
Flash memory standby control (FLSSTB<FSTB>)
main section code abs = 0x1000
; #### Operation for transferring a program to RAM #### (STEP1)
sRAMLOOP:
; #### Program executed in RAM ####
sRAMprogStart:
Example: Case in which FLSSTB is configured in the RAM area
1.
2.
3.
4.
5.
6.
7.
8.
Transferring a control program of the FLSSTB register to RAM
Invoking a program in the RAM area
Disabling (DI) the interrupt master enable flag (IMF ← "0")
Setting FLSSTB<FSTB> to "1"
Executing a user program
Repeatedly performing the operation described in 5 above until the request to return to the flash
memory is detected
Setting FLSSTB<FSTB> to "0"
Returning to the flash memory area
cRAMStartAdd equ 0x0200
LD
LD
LD
LD
INC
INC
CMP
J
CALL
:
:
J
DI
HL,cRAMStartAdd
IX,sRAMprogStart
A,(IX)
(HL),A
HL
IX
IX,sRAMprogEnd
NZ,sRAMLOOP
cRAMStartAdd
:
:
XXXX
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; Start address of RAM
; Transferring a program from sRAMprogStart to
; sRAMprogEnd to cRAMStartAdd
; Call the RAM program (step 2)
; Executing a user program
; Interrupt disable (step 3)
TMP89FS60