TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 86
TMP89xy60UG/FG
Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP89XY60UGFG.pdf
(432 pages)
Specifications of TMP89xy60UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
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4.3
Function
RA000
4.3.4
4.3.4.1
generates interrupt request signals.
External interrupt 4
External interrupt 4 detects the falling edge, the rising edge, both edges or "H" level of the INT4 pin and
Signal after noise removal
level is detected twice consecutively, the signal is recognized as a signal.
interrupts are unavailable. When operation returns to NORMAL1/2, IDLE1/2, SLOW1/2 or SLEEP1 mode,
sampling operation restarts.
Note 1: If noise is input consecutively during sampling of external interrupt pins, the noise cancel function does
Note 2: If an external interrupt pin is used as an output port, the input signal to the port is fixed to "L" when the
Note 3: Interrupt requests may be generated during transition of the operation mode. Before changing the op-
In SLOW1/2 or SLEEP1 mode, a signal is sampled by the low frequency clock divided by 4. If the same
In IDLE0, SLEEP0 or STOP mode, the noise canceller sampling operation is stopped and an external
Select an interrupt request signal generating condition at EINTCR4<INT4ES> for external interrupt 4.
Interrupt request signal generating condition detection function
not work properly. Set EINTCRx<INTxNC> according to the cycle of externally input noise.
mode is switched to the output mode, and thus an interrupt request occurs. To use the pin as an output
port, clear the corresponding interrupt enable register to "0" to disable the generation of interrupt.
eration mode, clear the corresponding interrupt enable register to "0" to disable the generation of
interrupt. When the operation mode is changed from NORMAL1/2 or IDLE1/2 to SLOW1/2 or SLEEP1,
wait 12/fs [s] after the operation mode is changed and clear the interrupt latch. And when the operation
mode is changed from SLOW1/2 or SLEEP1 to NORMAL1/2 or IDLE1/2, wait 2/fcgck+3/fspl [s] after the
operation mode is changed and clear the interrupt latch.
i=1 to 3
INTi pin
Table 4-4 Selection of Interrupt Request Generation Edge
Table 4-3 Noise Canceller Sampling Lock
EINTCR4<INT4ES>
EINTCRx<INTxNC>
Figure 4-5 Noise Cancel Operation
00
01
10
11
00
01
10
11
Page 70
"H" level interrupt
Sampling interval
Signal
Falling edge
Rising edge
Detected at
Both edges
fcgck/2
fcgck/2
fcgck/2
fcgck
2
3
4
Noise
TMP89FS60
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