TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 192

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

14.2
Control
RA005
Timer counter 01 mode register
T01MOD
(0x002B)
Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock [Hz]
Note 2: Set T01MOD while the timer is stopped. Writing data into T01MOD is invalid during the timer operation.
Note 3: In the 8-bit timer/event modes, the TFF1 setting is invalid. In this mode, when the PWM1 and PPG1 pins are set as the
Note 4: When EIN1 is set to "1" and the external clock input is selected as the source clock, the TCK1 setting is ignored.
Read/Write
Bit Symbol
After reset
function output pins in the port setting, the pins always output the "H" level.
DBE1
TCM1
TCK1
TFF1
EIN1
Timer F/F1 control
Double buffer control
Operation clock selection
Selection for using external source
clock
Operation mode selection
TFF1
R/W
7
1
DBE1
R/W
6
1
5
0
Page 176
000
001
010
011
100
101
110
111
00
01
10
11
0
1
0
1
0
1
Clear
Set
Disable the double buffer
Enable the double buffer
Select the internal clock as the source clock.
Select an external clock as the source clock. (the falling edge of the TC01
pin)
8-bit timer/event counter modes
8-bit timer/event counter modes
8-bit pulse width modulation output
(PWM) mode
8-bit programmable pulse gener-
ate (PPG) mode
SYSCR1<DV9CK>
TCK1
R/W
4
0
T001CR<TCAS>="0"
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
NORMAL1/2 or IDLE1/2 mode
fcgck
= "0"
(8-bit mode)
11
10
8
6
4
2
3
0
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck
EIN1
= "1"
R/W
fs/2
fs/2
2
0
16-bit timer/event counter modes
16-bit timer/event counter modes
12-bit pulse width modulation out-
put (PWM) mode
16-bit programmable pulse gener-
ate (PPG) mode
4
3
8
6
4
2
T001CR<TCAS>="1"
(16-bit mode)
SLOW1/2 or SLEEP1
1
0
TMP89FS60
TCM1
R/W
mode
fs/2
fs/2
fs/2
-
-
-
-
-
4
3
2
0
0