TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 171

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RB002
TA0CR<TA0S>
TA0MOD<TA0DBE>
Source clock
Counter
Write to TA0DRAL
Write to TA0DRAH
Temporary buffer
(8 bits)
TA0DRAL
TA0DRAH
INTTCA0 interrupt request
TA0CR<TA0S>
TA0MOD<TA0DBE>
Source clock
Counter
Write to TA0DRAL
Write to TA0DRAH
Temporary buffer
(8 bits)
Double buffer
(16 bits)
TA0DRAL
TA0DRAH
INTTCA0 interrupt request
Write n
Write n
n
n
Write m
Write m
mn
m
m
n
n
Reflected by writing to TA0DRAH
Reflected at the same time as data
is written into TA0DRAH while
the timer is stopped
Figure 13-2 Timer Mode Timing Chart
0
0
Timer start
Timer start
1
1
When the double buffer is disabled (TA0MOD<TA0DBE>=”0”)
When the double buffer is enabled (TA0MOD<TA0DBE>=”1”)
2
2
3
3
Match detection
Match detection
4
4
Page 155
mn-1
mn-1
mn
mn
0
0
Counter clear
Counter clear
1
1
2
2
Match detection
Write s
Write s
s
s
3
3
Match detection
Write r
Write r
rs
s
r
Reflected by writing to TA0DRAH
mn-1
rs-1
mn
rs
0
0
Reflected by
an interrupt
Counter clear
s
r
1
1
Match detection
Counter clear
2
Timer stop
0
rs-1
TMP89FS60
rs
0
1