TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 113

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA007
8.3
8.3.1
I/O Port Registers
System clock reset
(internal factor reset)
P0PRD0 read
P0PRD1 read
as the high-frequency oscillation connection pin and the low-frequency oscillation connection pin.
port is used in the input mode.
Port P0 (P03 to P00)
Port P0 is a 4-bit input/output port that can be set to input or output for each bit individually, and it is also used
Port P0 contains a programmable pull-up resistor on the VDD side. This pull-up resistor can be used when the
Reset signal (Reset 2)
Table 8-3 Port P0
SYSCR1<OUTEN>
SYSCR1<STOP>
Input/output control
Input/output control
SYSCR2<XEN>
Function control
Secondary
Pull-up control
Pull-up control
(for each bit)
(for each bit)
(for each bit)
(for each bit)
(for each bit)
(for each bit)
(for each bit)
function
Output latch
Output latch
P0PU0 write
P0CR0 write
P0DR0 write
P0PU1 write
P0CR1 write
P0DR1 write
P0FC0 write
-
-
Figure 8-2 Port P0 (P00, P01)
-
-
-
-
Page 97
-
-
VDD
VDD
XTOUT
P03
Programmable
pull-up resistor
Programmable
pull-up resistor
Note1 : R = 100Ω (typ.)
Note2 : Rf = 1.2MΩ (typ.)
Note3 : Ro = 0.5kΩ (typ.)
Note4 : R
XTIN
P02
IN3
= 50kΩ (typ.)
R
R
R
R
VDD
VDD
IN3
IN3
XOUT
P01
P00
XIN
Rf
Ro
TMP89FS60
P00
(XIN)
P01
(XOUT)

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