TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 231

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA000
15.4
15.4.1
15.4.2
Real Time Clock Operation
RTCCR<RTCSEL> when RTCCR<RTCRUN> is "1", the existing data remains effective.
be rewritten at the same time as disabling the real time clock operation.
"1".
frequency clock.
request (INTRTC) is generated and the counter continues counting.
stops counting of the low-frequency clock.
RTCCR<RTCSEL> can be rewritten only when RTCCR<RTCRUN> is "0". If data is written into
RTCCR<RTCSEL> can be rewritten at the same time as enabling the real time clock operation, but it cannot
Set the interrupt generation interval to RTCCR<RTCSEL>, and at the same time, set RTCCR<RTCRUN> to
When RTCCR<RTCRUN> is set to "1", the binary counter for the real time clock starts counting of the low-
When the interrupt generation interval selected at RTCCR<RTCSEL> is reached, a real time clock interrupt
Clear RTCCR<RTCRUN> to "0".
When RTCCR<RTCRUN> is cleared to "0", the binary counter for the real time clock is cleared to "0" and
Enabling the real time clock operation
Disabling the real time clock operation
Page 215
TMP89FS60

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