TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 33

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RB000
2.3.3
Warm-up counter data register
Clock gear control register
(0x0FCE)
(0x0FCF)
WUCDR
CGCR
2.3.3.1
Note 4: Before starting the warm-up counter operation, set the source clock and the frequency division rate at WUCCR and set
Note 1: Don't start the warm-up counter operation with WUCDR set at "0x00".
Note 1: fcgck: Gear clock [Hz], fc: High-frequency clock [Hz]
Note 2: Don't change CGCR<FCGCKSEL> in the SLOW mode.
Note 3: Bits 7 to 2 of CGCR are read as "0".
Functions
peripheral circuits.
clock.
of I/O Ports.
P0FC0 to "1" and then set SYSCR2<XEN> to "1".
P0FC2 to "1" and then set SYSCR2<XTEN> to "1".
oscillator between the XIN and XOUT pins and between the XTIN and XTOUT pins respectively.
XTIN pins and the XOUT/XTOUT pins are kept open.
FCGCKSEL
WUCDR
Read/Write
Read/Write
Bit Symbol
Bit Symbol
the warm-up time at WUCDR.
After reset
After reset
The clock generator generates the basic clock for the system clocks to be supplied to the CPU core and
It contains two oscillation circuits: one for the high-frequency clock and the other for the low-frequency
The oscillation circuit pins are also used as ports P0. For the setting to use them as ports, refer to the chapter
To use ports P00 and P01 as the high-frequency clock oscillation circuits (the XIN and XOUT pins), set
To use ports P02 and P03 as the low-frequency clock oscillation circuits (the XTIN and XTOUT pins), set
The high-frequency (fc) clock and the low-frequency (fs) clock can easily be obtained by connecting an
Clock input from an external oscillator is also possible. In this case, external clocks are applied to the XIN/
Clock generator
Clock gear setting
R
7
0
7
0
-
R
6
1
6
0
-
R
5
1
5
0
-
00 :
01 :
10 :
11 :
Page 17
fcgck = fc / 4
fcgck = fc / 2
fcgck = fc
Reserved
Warm-up time setting
R
4
0
4
0
-
WUCDR
R/W
R
3
0
3
0
-
R
2
1
2
0
-
1
1
1
0
FCGCKSEL
TMP89FS60
R/W
0
0
0
0