TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 277

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA001
SIO0CR<SIOS>
SIO0CR<SIOM>
SIO0SR<SIOF>
SIO0SR<SEF>
SIO0SR<REND>
Internal clock
SI0 pin (input)
SCLK0 pin (output)
INTSIO0 interrupt request
SIO0BUF
Read SIO0BUF
registers keep their values.
setting SIO0CR<SIOM> to "00", SIO0CR<SIOS> and SIO0SR are cleared to "0" and the SIO stops the
operation, regardless of the SIO0SR<SEF> value. If the internal clock is selected, the SCLK0 pin returns to
the initial level.
Figure 17-9 8-bit Receive Mode (Internal Clock and Reserved Stop)
After the operation has stopped completely, SIO0SR<SIOF and SEF> are cleared to "0". Other SIO0SR
The receive operation can be forced to stop by setting SIO0CR<SIOM> to "00" during the operation. By
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Data A
A
Page 261
Automatic wait
Reading data A
10
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Reserved
stop
Data C
C
Reading data C
TMP89FS60