TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 346

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
21.4
Toggle Bit (D6)
RA006
21.4
21.3.6
of the 6th bit (D6) in data read by a read operation is reversed each time a read is performed. This bit reversal can be
used as a software mechanism for checking the completion of each operation. Normally, perform read operations twice
on the same address in the flash memory, and perform polling until the same data is read from the flash memory.
bit read by the first read operation is always "1".
Note 1: If FLSCR1<FLSMD> is set to "disable", the toggle bit is not reversed.
Note 2: Do not read the toggle bit by using a 16-bit transfer instruction. If the toggle bit is read using a 16-bit transfer
Note 3: Because the instruction cycle is longer than the write time in SLOW mode, the value is not reversed, even if the
After the flash memory write, the chip erase, and the security program command sequence are executed, the value
After the flash memory write, the chip erase, and the security program command sequence are executed, the toggle
Toggle Bit (D6)
memory overwrite command and the RAM loader command cannot be executed in serial PROM mode.
enabled or disabled, read 0xFF7F in product ID mode. Refer to Table 21-4 for further details. The time needed
to enable or disable the security program is 40 μs maximum. The next command sequence cannot be executed
until the security program setting is completed. To check the completion of the security program setting, perform
read operations twice on the same address in the flash memory, and perform polling until the same data is read.
When the security program setting is being made, bit 6 is reversed each time a read is performed.
If the security program is enabled, the flash memory is read protected in parallel PROM mode, and the flash
To disable the security program, the chip erase must be performed. To check whether the security program is
Security program
instruction, the toggle bit does not function properly.
toggle bit is read right after the Byte Program is performed.
Page 330
TMP89FS60

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