TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 205

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA005
14.4.3.3
Figure 14-7 Operation When T00PWM and the Up Counter Have the Same Value
by setting T00MOD<DBE0> to "0" or enabled by setting T00MOD<DBE0> to "1".
The double buffer can be used for T00PWM by setting T00MOD<DBE0>. The double buffer is disabled
Double buffer
T00MOD<DBE0>
Source clock
Counter
Write to T00PWM
T00PWM
<PWMDUTY>
PWM0 pin output
・ When the double buffer is enabled
・ When the double buffer is disabled
first stored in the double buffer, and T00PWM is not updated immediately. T00PWM compares
the previous set value with the up counter value. When the 2 × n-th overflow occurs, an INTTC00
interrupt request is generated and the double buffer set value is stored in T00PWM. Subsequently,
the match detection is executed using a new set value.
value) is read out, not the T00PWM value (the currently effective value).
immediately stored in both the double buffer and T00PWM.
immediately stored in T00PWM. Subsequently, the match detection is executed using a new set
value. If the value set to T00PWM is smaller than the up counter value, the PWM0 pin is not
reversed until the up counter overflows and a match detection is executed using a new set value.
If the value set to T00PWM is equal to the up counter value, the match detection is executed
immediately after data is written into T00PWM. Therefore, the timing of changing the PWM0 pin
may not be an integral multiple of the source clock (Figure 14-7). Similarly, if T00PWM is set
during the additional pulse output, the timing of changing the PWM0 pin may not be an integral
multiple of the source clock. If these are problems, enable the double buffer.
immediately stored in T00PWM.
When a write instruction is executed on T00PWM during the timer operation, the set value is
When a read instruction is executed on T00PWM, the value in the double buffer (the last set
When a write instruction is executed on T00PWM while the timer is stopped, the set value is
When a write instruction is executed on T00PWM during the timer operation, the set value is
When a write instruction is executed on T00PWM while the timer is stopped, the set value is
n-5
n
n-4
Page 189
Match detection
n-3
Write n-2
n-2
n-2
n-1
n
TMP89FS60