TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 226

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

14.4
Functions
RA005
T001CR<T01RUN>
T01MOD<TFF1>
Source clock
Counter
Write to T00REG
Write to T01REG
Double buffer
T01+00REG
Write to T00PWM
Write to T01PWM
Double buffer
T01+00PWM
PPG1 pin output
INTTC00 interrupt
request
INTTC00 interrupt
request
Write b
Write a
Write h
Becomes the level selected at
TFF1 while the timer is stopped
Write g
Figure 14-16 16-bit PPG Output Mode Timing Chart
ab
ab
gh
gh
Timer start
(Duty pulse)
0
gh
Match detection
1
(Cycle 1)
When the double buffer is enabled (T01MOD<DBE1>=”1”)
ab
Match detection
gh
Write d
gh
+1
Write c
Write m
Write k
cd
km
(Duty pulse)
ab
cd
km
Counter
clear
0
km
1
(Cycle 1)
Page 210
Match detection
cd
Match detection
km
km
+1
(Duty pulse)
cd
Counter
clear
0
km
1
(Cycle 1)
Write f
Match detection
cd
Write e
Match detection
km
Write r
Write q
km
+1
ef
qr
(Duty pulse)
cd
ef
qr
Counter
clear
0
qr
1
(Cycle 1)
Match detection
ef
Match detection
qr
Timer stop
+1
qr
TMP89FS60
ef
Counter
clear
Returns to the
level selected
at TFF1
0
1
0