TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 271

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA001
17.5
17.5.1
17.5.1.1
17.5.1.2
17.5.1.3
17.5.1.4
Transfer Modes
The 8-bit transmit mode is selected by setting SIO0CR<SIOM> to "01".
8-bit transmit mode
at SIO0CR<SIODIR> and a serial clock at SIO0CR<SIOCKS>. To use the internal clock as the serial clock,
select an appropriate serial clock at SIO0CR<SIOCKS>. To use an external clock as the serial clock, set
SIO0CR<SIOCKS> to "111".
SIO0CR<SIOS> to "1".
progress, or when SIO0SR<SIOF> is "1". Make these settings while the serial communication is stopped.
While the serial communication is in progress (SIO0SR<SIOF>="1"), only writing "00" to SIO0CR<SIOM>
or writing "0" to SIO0CR<SIOS> is valid.
transmit data is transferred from SIO0BUF to the shift register, and then transmitted as the serial data from
the SO0 pin according to the settings of SIO0CR<SIOEDG, SIOCKS and SIODIR>. The serial data becomes
undefined if the transmit operation is started without writing any transmit data to SIO0BUF.
the external clock operation, an external clock must be supplied to the SCLK0 pin.
interrupt request is generated.
the written data is transferred to the shift register immediately. At this time, SIO0SR<TBFL> remains at "0".
If new data is written to SIO0BUF in this state, the contents of SIO0BUF are overwritten by the new value.
Make sure that SIO0SR<TBFL> is "0" before writing data to SIO0BUF.
of SIO0SR<TBFL>.
(1)
Before starting the transmit operation, select the transfer edges at SIO0CR<SIOEDG>, a transfer format
The 8-bit transmit mode is selected by setting SIO0CR<SIOM> to "01".
The transmit operation is started by writing the first byte of transmit data to SIO0BUF and then setting
Writing data to SIO0CR<SIOEDG, SIOCKS and SIODIR> is invalid when the serial communication is in
The transmit operation is started by writing data to SIO0BUF and then setting SIO0CR<SIOS> to "1". The
In the internal clock operation, the serial clock of the selected baud rate is output from the SCLK0 pin. In
By setting SIO0CR<SIOS> to "1", SIO0SR<SIOF and SEF> are automatically set to "1" and an INTSIO0
SIO0SR<SEF> is cleared to "0" when the 8th bit of the serial data is output.
If data is written to SIO0BUF when the serial communication is in progress and the shift register is empty,
If data is written to SIO0BUF when some data remains in the shift register, SIO0SR<TBFL> is set to "1".
The operation on completion of the data transmission varies depending on the operating clock and the state
Setting
Starting the transmit operation
Transmit buffer and shift operation
Operation on completion of transmission
becomes the "H" level. SIO0SR<SEF> remains at "0". When the internal clock is used, the serial clock
and data output is stopped until the next transmit data is written into SIO0BUF (automatic wait).
When the data transmission is completed, the SCLK0 pin becomes the initial state and the SO0 pin
When the internal clock is used and SIO0SR<TBFL> is "0"
Page 255
TMP89FS60

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