TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 333

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA006
Flash memory control register 1 monitor
(0x0FD1)
FLSCRM
Note 1: FLSCRM is the register that checks the value of the shift register of the flash memory control register 1.
Note 2: FLSMDM turns into "1" only if FLSMD="101" becomes effective.
Note 3: If an instruction to read FLSCRM is executed, "0" is read from bits 7 and 6.
Note 4: In serial PROM mode, "1" is always read from BAREAM.
ROMSELM
FLSMDM
BAREAM
FAREAM
Read/Write
Bit Symbol
After reset
Monitoring of FLSCR1<FLSMD>
status
Monitoring of FLSCR1<BAREA> status
Monitoring of FLSCR1<FAREA> status
Monitoring of FLSCR1<ROMSEL> status
R
7
0
R
0
6
FLSMDM
R
5
0
Page 317
0
1
FLSCR1<FLSMD>="101" setting disabled
FLSCR1<FLSMD>="101" setting enabled
Value of currently enabled FLSCR1<BAREA>
Value of currently enabled FLSCR1<FAREA>
Value of currently enabled FLSCR1<ROMSEL>
BAREAM
R
4
0
3
0
FAREAM
R
2
0
1
0
ROMSELM
TMP89FS60
R
0
0

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