TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 164

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

13.2
Control
RB002
Timer counter A0 mode register
TA0MOD
(0x0031)
Note 1: fcgck, Gear clock [Hz]; fs, Low-frequency clock [Hz]
Note 2: Set TA0MOD in the stopped state (TA0CR<TA0S>="0"). Writing to TA0MOD is invalid during the operation
TA0MCAP
TA0METT
TA0DBE
TA0TED
Read/Write
TA0CK
Bit Symbol
After reset
(TA0CR<TA0S>="1").
TA0M
Double buffer control
External trigger input selection
Pulse width measurement mode
control
External trigger timer mode control
Timer counter 1 source clock selec-
tion
Timer counter 1 operation mode se-
lection
TA0DBE
R/W
7
1
TA0TED
R/W
6
0
TA0MCAP
TA0METT
R/W
5
0
Page 148
000
001
010
011
100
101
110
111
00
01
10
11
0
1
0
1
0
1
0
1
Disable the double buffer
Enable the double buffer
Rising edge/H level
Falling edge/L level
Double edge capture
Single edge capture
Trigger start
Trigger start & stop
Timer mode
Timer mode
Event counter mode
PPG output mode (Software start)
External trigger timer mode
Window mode
Pulse width measurement mode
Reserved
SYSCR1<DV9CK>
4
0
fcgck/2
fcgck/2
fcgck/2
NORMAL 1/2 or IDLE 1/2 mode
fcgck/2
="0"
TA0CK
R/W
10
6
2
3
0
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
="1"
fs/2
2
0
3
6
2
TA0M
R/W
SLOW1/2 or SLEEP1
1
0
TMP89FS60
mode
fs/2
-
-
-
3
0
0