TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 352

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

21.5
Access to the Flash Memory Area
RA006
sSectorErase:
; Sector erase process (step 7)
; Write process (step 13)
sByteProgram:
; End process
sRAMopEnd:
sLOOP1:
; Address conversion process (steps 6 and 12)
sAddConv:
sAddConvEnd:
; Interrupt subroutine
NOP
NOP
LD
CALL
LD
LD
LD
LD
LD
LD
J
CALL
LD
LD
LD
LD
NOP
NOP
NOP
LD
CMP
J
LD
LD
RET
LD
SWAP
AND
SWAP
AND
OR
XOR
SHRC
OR
LD
LD
LD
TEST
J
OR
LD
RET
(SYSCR2),0x10
sAddConv - sRAMprogStart + cRAMStartAdd
(HL),E
(DE),L
(HL),0x80
(HL),E
(DE),L
(IX),0x30
sRAMopEnd
sAddConv - sRAMprogStart + cRAMStartAdd
(HL),E
(DE),L
(HL),0xA0
(IX),B
A,(IX)
A,(IX)
NZ,sLOOP1
(FLSCR1),0x40
(FLSCR2),0xD5
WA,IX
C
C,0x10
W
W,0x08
C,W
C,0x08
C
C,0xA0
(FLSCR1),C
(FLSCR2),0xD5
WA,IX
C.3
Z,sAddConvEnd
W,0x80
IX,WA
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; Generate system clock reset
; Address conversion process
; 1st Bus Write Cycle (note 1)
; 2nd Bus Write Cycle (note 1)
; 3rd Bus Write Cycle (note 1)
; 4th Bus Write Cycle (note 1)
; 5th Bus Write Cycle (note 1)
; 6th Bus Write Cycle (note 1)
; Address conversion process
; 1st Bus Write Cycle (note 1)
; 2nd Bus Write Cycle (note 1)
; 3rd Bus Write Cycle (Note 1)
; 4th Bus Write Cycle (note 1)
; (note 2)
; (note 2)
; (note 2)
; (steps 8,14)
; Loop until the read values become the same
; Disable the execution of command sequence
; (steps 9 and 15)
; Reflect the FLSCR1 setting
; Return to flash memory
; Enable the execution of command sequence. Make the
; FAREA setting.
; Reflect the FLSCR1 setting
TMP89FS60