TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 190

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

14.2
Control
RA005
Timer counter 00 mode register
T00MOD
(0x002A)
Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock [Hz]
Note 2: Set T00MOD while the timer is stopped. Writing data into T00MOD is invalid during the timer operation.
Note 3: In the 8-bit timer/event modes, the TFF0 setting is invalid. In this mode, when the PWM0 and PPG0 pins are set as the
Note 4: When EIN0 is set to "1" and the external clock input is selected as the source clock, the TCK0 setting is ignored.
Note 5: When the T001CR<TCAS> bit is "1", timer 00 operates in the 16-bit mode. The T00MOD setting is invalid and timer 00
Note 6: When the 16-bit mode is selected at T001CR<TCAS>, the timer start is controlled at T001CR<T01RUN>. Timer 00 is not
Read/Write
Bit Symbol
After reset
function output pins in the port setting, the pins always output the "H" level.
cannot be used independently in this mode. When the PWM0 and PPG0 pins are set to the function output pins in the
port setting, the pins always output the "H" level.
started by writing data into T001CR<T00RUN>.
DBE0
TCM0
TFF0
TCK0
EIN0
Timer F/F0 control
Double buffer control
Operation clock selection
Selection for using external source
clock
Operation mode selection
TFF0
R/W
7
1
DBE0
R/W
6
1
5
0
Page 174
000
001
010
011
100
101
110
111
00
01
10
11
0
1
0
1
0
1
Clear
Set
Disable the double buffer
Enable the double buffer
Select the internal clock as the source clock.
Select an external clock as the source clock.
(the falling edge of the TC00 pin)
8-bit timer/event counter modes
8-bit timer/event counter modes
8-bit pulse width modulation output (PWM) mode
8-bit programmable pulse generate (PPG) mode
SYSCR1<DV9CK>
TCK0
R/W
4
0
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
NORMAL1/2 or IDLE1/2 mode
fcgck
= "0"
11
10
8
6
4
2
3
0
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck
EIN0
= "1"
R/W
fs/2
fs/2
2
0
4
3
8
6
4
2
SLOW1/2 or SLEEP1
1
0
TMP89FS60
TCM0
R/W
mode
fs/2
fs/2
fs/2
-
-
-
-
-
4
3
2
0
0