TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 248

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

16.9
Data Sampling Method
RA001
and the data receiving is suspended. Subsequently, when a falling edge is detected in the input pulses to the RXD0
pin, RT clock counting restarts and the data receiving restarts with the start bit.
RT clock
RXD0 pin
Internal received
data
Shift register
If "1" is detected in sampling of the start bit, for example, due to the influence of noise, RT clock counting stops
A falling edge
is detected
RT15 14 13 12 11 10 9
Noise
the next falling edge is detected
Counting is suspended until
the start bit is 1
Error because
8
7 6
Figure 16-8 Start Bit Sampling
A falling edge
is detected
15 14 13 12 11 10 9
Start Bit
Start Bit
Page 232
because the start bit is 0
Receiving continues
8
7
6
5
4
3
2
1 0 15 14 13 12 11 10 9
Bit 0
Bit 0
The received data is taken
into the shift register
8
TMP89FS60
7
6
5
Bit 0
4 3