TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 79

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA000
4. External Interrupt control circuit
4.1
4.2
INTi pin
INT4 pin
by the built-in digital noise canceller.
and an interrupt signal generation circuit.
interrupt, after noise is removed by the noise canceller.
Configuration
Control
External interrupts detects the change of the input signal and generates an interrupt request. Noise can be removed
The external interrupt control circuit consists of a noise canceller, an edge detection circuit, a level detection circuit
Externally input signals are input to the rising edge or falling edge or level detection circuit for each external
External interrupts are controlled by the following registers:
fcgck
INTj pin
fcgck
fs/4
fs
Noise canceller
Noise canceller
A B C D S
1
A B C D S
1
2
2
Z
Z
3 4
Noise canceller
3 4
fcgck
Figure 4-2 External Interrupts 1/2/3
Figure 4-1 External Interrupts 0/5
Figure 4-3 External Interrupt 4
fs/4
EINTCR4
EINTCRi
detection circuit
detection circuit
Level detection
detection circuit
detection circuit
Falling edge
Rising edge
Rising edge
Falling edge
Page 63
detection circuit
circuit
Falling edge
INT4ES
INTiES
INT4LVL
INTiLVL
signal generation
Interrupt request
signal generation
Interrupt request
Interrupt request signal
generation circuit
circuit
circuit
INTj interrupt
request
j=0,5
TMP89FS60
INT4 interrupt
request
i=1 to 3
INTi interrupt
request