TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 199

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA005
Figure 14-3 Operation When T00REG and the Up Counter Have the Same Value
T001CR<T00RUN>
T00MOD<DBE0>
Source clock
Counter
Write to T00REG
T00REG
INTTC00 interrupt request
T001CR<T00RUN>
T00MOD<DBE0>
Source clock
Counter
Write to T00REG
Double buffer
T00REG
INTTC00 interrupt request
T00MOD<DBE0>
Source clock
Counter
Write to T00REG
T00REG
INTTC00 interrupt request
Write m
Write m
m
m
m
Reflected by writing to T00REG
Reflected at the same time
as data is written into T00REG
while the timer is stopped
Figure 14-2 Timer Mode Timing Chart
0
0
Timer start
Timer start
n-5
n
1
1
When the double buffer is disabled (T00MOD<DBE0>=”0”)
When the double buffer is enabled (T00MOD<DBE0>=”1”)
2
2
n-4
3
3
Match detection
Match detection
4
4
Page 183
Match detection
n-3
m-1
m-1
Write n-2
m
m
0
0
Counter clear
Counter clear
n-2
1
1
2
2
Counter clear
n-2
Match detection
0
3
3
Write n
Match detection
Write n
n
n
Reflected by writing to T00REG
m-1
n-1
1
m
n
0
0
Reflected by
an interrupt
Counter clear
n
Match detection
1
1
Counter clear
2
2
Timer stop
0
n-1
TMP89FS60
n
0
1

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