TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 217

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA005
14.4.7
Timer register 00
Timer register 01
T00PWM
T01PWM
(0x0028)
(0x0029)
14.4.7.1
with a resolution of 8 bits. An additional pulse of 4 bits can be inserted, which enables PWM output with a
resolution nearly equivalent to 12 bits.
In the 12-bit PWM output mode, TC00 and TC01 are cascaded to output the pulse-width modulated pulses
12-bit pulse width modulation (PWM) output mode
settings of TC00 are ignored and those of TC01 are effective in the 16-bit timer mode.
source clock, set T01MOD<EIN1> to "0" and select the clock at T01MOD<TCK1>. To use an external clock
as the source clock, set T01MOD<EIN1> to "1".
becomes invalid. Be sure to complete the required mode settings before starting the timer. (Make settings
when T001CR<T00RUN> and <T01RUN> are "0".)
the timer registers T00PWM and T01PWM. Set bits 11 to 8 of the 12-bit value at the lower 4 bits of T01PWM
and set bits 7 to 0 at T00PWM. Refer to the following table for the register configuration. Hereinafter, the
12-bit value specified by the combined setting of T00PWM and T01PWM is indicated as T01+00PWM. The
timer register settings are reflected on the double buffer or T01+00PWM when a write instruction is executed
on T01PWM. Be sure to execute the write instructions on T00PWM and T01PWM in this order. (When data
is written to the high-order register, the set values of the low-order and high-order registers become effective
at the same time.)
of T01PWM and the written values are read out as they are when the bits are read. Normally, set these bits
to "0".
width (time before the first change in the output) for one cycle (256 counts of the source clock). Hereinafter,
an 8-bit value specified by the combined setting of PWMDUTYH and PWMDUTYL is indicated as
PWMDUTY.
of the duty pulse by setting each bit to "1". The additional pulses are inserted in the positions listed in Table
14-10. PWMAD 3 to 0 can be combined to specify the number of times of inserting the additional pulses in
16 cycles to any number from 1 to 16. Examples of inserting additional pulses are shown in Figure 14-13.
Read/Write
Read/Write
Bit Symbol
Bit Symbol
After reset
After reset
Setting T001CR<TCAS> to "1" connects TC00 and TC01 and activates the 16-bit timer mode. All the
The 12-bit PWM mode is selected by setting T01MOD<TCM1> to "10". To use the internal clock as the
Set T01MOD<DBE1> to "1" to use the double buffer.
Setting T001CR<T01RUN> to "1" starts the operation. After the timer is started, writing to T01MOD
Set the count value to be used for the match detection and the additional pulse value as a 12-bit value at
Bits 7 to 4 of T01PWM are not used in the 12-bit PWM mode. However, data can be written to these bits
PWMDUTYH and PWMDUTYL are 4-bit registers. They are combined to set an 8-bit value of duty pulse
PWMAD3 to 0 are the additional pulse setting register. Additional pulses can be inserted in specific cycles
Setting
R/W
7
1
7
1
R/W
6
1
6
1
PWMDUTYL
R/W
5
1
5
1
Page 201
R/W
4
1
4
1
PWMAD3
R/W
R/W
3
1
3
1
PWMAD2
R/W
R/W
2
1
2
1
PWMDUTYH
PWMAD1
R/W
R/W
1
1
1
1
TMP89FS60
PWMAD0
R/W
R/W
0
1
0
1