TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 428

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
25.11
Revision History
RA004
25.11
RA001
RA002
RA003
RA004
Rev
Revision History
"25.2.2 MCU mode (Except Flash Programming or erasing)"
The minimum value of the supply voltage is changed from 4.5V to 4.3V when fcgck is 8.0MHz.
The condition of the V
The I
The maximum supply current in SLOW1mode is changed.
The maximum supply current in SLEEP1 mode is changed.
The maximum supply current in SLEEP0 mode is changed.
The maximum suppy current in STOP mode is changed.
V
"25.7.2 MCU mode (Except Flash Programming or erasing)"
The V
"25.2.2 MCU mode (Except Flash Programming or erasing)" Changed range of clock frequency from "3.0 to 5.5V" to "3.0 to 4.3V".
"25.2.2 MCU mode (Except Flash Programming or erasing)" Deleted fcgck=8MHz of supply voltage (condition2).
Added Figure 25-1 to Figure 25-3.
"25.5 Power-on Reset Circuit Characteristics" Revised table (I
"25.10 Handling Precaution" Revised mark of lead-free.
MODE
DD
DD
is defined.
in "25.3 DC Characteristics"
is changed from 4.5V to 4.3V.
DD
in the clock frequency is changed from 4.5V to 4.3V when fcgck is 8.0MHz.
Page 412
Description
PWUP
Unit) from "ms" to "s".
TMP89FS60

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