TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 125

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA007
8.3.4
Peripheral
used as the analog input and the key-on wakeup input.
port is used in the input mode.
functions
Key-on
wakeup
Port P4 (P47 to P40)
AD
Port P4 is an 8-bit input/output port that can be set to input or output for each bit individually, and it is also
Port P4 contains a programmable pull-up resistor on the VDD side. This pull-up resistor can be used when the
Table 8-10 Port P4
Secondary
AINi enable signal
ADCCR1<AINEN>
function
SYSCR1<OUTEN>
KWIi enable signal
P4PRD read
SYSCR1<STOP>
KWI7
AIN7
P47
Input/output control
Function control
Pull-up control
(for each bit)
(for each bit)
(for each bit)
(for each bit)
Output latch
P4PU write
P4CR write
P4FC write
P4DR write
Reset signal (Reset 2)
KWI6
AIN6
P46
KWIi
Figure 8-6 Port P4
KWI5
AIN5
P45
Page 109
KWI4
AIN4
P44
KWI3
AIN3
P43
AINi
KWI2
AIN2
P42
VDD
KWI1
AIN1
P41
Note1 : R = 100Ω (typ.)
Note2 : R
Note3 : i = 0 to 7
IN3
KWI0
AIN0
P40
= 50kΩ (typ.)
Programmable
pull-up resistor
R
R
VDD
IN3
TMP89FS60
P4i

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