tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 102
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
Available stocks
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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7.5
-
Set IE to input mode when using WAIT/BUSREQ input function.
In addition to above functions, a function of inputting and outputting the control and status signals of CPU is
provided. If the P30 pin is set to RD signal output mode (<P30F> = "1"), the RD strobe is output only when
an external address area is accessed. Likewise, if the P31 pin is set to WR signal output mode
(<P31F> = "1"), the WR strobe is output only when an external address area is accessed.
The port 3 is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in
units of bits. Outputs can be set by using the control register P3CR and the function register P3FC1.
Port 3 (P30~P37)
P3 read
(Function control)
(Output control)
(Output control)
(Output latch)
(Input control)
P3PUP
P3FC1
P3CR
P3IE
P3
RD,WR,HWR,R/W
Bus opening
Fig. 7.4 Port 3 (P30~P32, P36)
TMP19A61(rev1.0) 7-101
STOP/RESET
drive disable
1
0
0
1
0
1
Bus opening
0
1
TMP19A61
Port 3
P30~P32,P36
(RD,WR,HWR,R/W)
RESET
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