tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 416
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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15.7.1
SCK pin output
SO pin output
Write the
transmit data
Serial Clock
Internal clock
External clock (<SCK2:0> =“111”)
Fig. 15.7.1.4 Maximum Transfer Frequency of External Clock Input
Clock source
Internal or external clocks can be selected by programming SBI0CR1 <SCK2:0>.
In the internal clock mode, one of the seven frequencies can be selected as a serial
clock, which is output to the outside through the SCK pin. At the beginning of a
transfer, the SCK pin output becomes the "H" level.
If the program cannot keep up with this serial clock rate in writing the transmit data or
reading the received data, the SBI automatically enters a wait period. During this
period, the serial clock is stopped automatically and the next shift operation is
suspended until the processing is completed.
The SBI uses an external clock supplied from the outside to the SCK pin as a serial
clock. For proper shift operations, the serial clock at the "H" and "L" levels must have
the pulse widths as shown below.
SCK pin
a
a
1
0
t
SCKL
a
2
1
, t
TMP19A61
Fig. 15.7.1.3 Automatic Wait
SCKH
a
t
SCK
2
3
a
> 8/fsys
5
t
SCKH
a
7
6
(
rev1.0
a
Automatic wait
8
7
)
-15-415
b
b
1
0
b
1
2
c
b
4
b
6
5
b
7
6
TMP19A61
b
8
7
c
1
0
c
2
1
c
3
2
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