tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 403

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.5.8
15.5.9
15.5.10 Lost-arbitration Detection Monitor
SCL (line)
Internal SDA output
(master A)
Internal SDA output
(master B)
SDA line
Interrupt Service Request and Release
Serial Bus Interface Operating Modes
The I
requires the bus arbitration procedure to ensure correct data transfer.
When a serial bus interface interrupt request (INTSBI) is generated, SBI0CR2 <PIN> is
cleared to "0." While <PIN> is "0," the SBI pulls the SCL line to the "L" level.
After transmission or reception of one data word, <PIN> is cleared to "0." It is set to "1"
when data is written to or read from SBI0DBR. It takes a period of t
be released after <PIN> is set to "1."
In the address recognition mode (<ALS> = "0"), <PIN> is cleared to "0" when the received
slave address matches the value specified at I2CAR or when a general-call address is
received; i.e., the eight bits following the start condition are all zeros. When the program
writes "1" to SBI0CR2<PIN>, it is set to "1." However, writing "0" does clear this bit to "0."
SBI0CR2 <SBIM1:0> selects an operating mode of the serial bus interface. <SBIM1:0>
must be set to "10" to configure the SBI for the I
free before switching the operating mode to the port mode.
A master that attempts to generate the start condition while the bus is busy loses bus
arbitration, with no start condition occurring on the SDA and SCL lines. The I
arbitration takes place on the SDA line.
The arbitration procedure for two masters on a bus is shown below. Up until point a,
Master A and Master B output the same data. At point "a", Master A outputs the "L" level
and Master B outputs the "H" level. Then Master A pulls the SDA bus line to the "L" level
because the line has the wired-AND connection. When the SCL line goes high at point b,
the slave device reads the SDA line data, i.e., data transmitted by Master A. At this time,
data transmitted by Master B becomes invalid. In other words, Master B loses arbitration.
Master B releases its SDA pin, so that it does not affect the data transfer initiated by
another master. If two or more masters have transmitted exactly the same first data word,
the arbitration procedure continues with the second data word.
2
C bus has the multi-master capability (there are two or more masters on a bus), and
TMP19A61
Fig. 15.5.10.1 Lost Arbitration
(
rev1.0
a
)
-15-402
b
Loses arbitration and sets the
internal SDA output to "1”.
2
C bus mode. Make sure that the bus is
TMP19A61
LOW
for the SCL line to
2
C-bus